The figure below displays the logical analyzer settings tab.

• Fs max buf - list that allows selecting the sampling frequency if more it will be buffer reading. In this case the maximum frequency equal to 300 KHz is set, i.e. for the sampling frequency from 400 KHz and higher it will be buffer reading and for the sampling frequency of 1...300 KHz it will be pipe reading. Fs max buf is determined by experiment on the basis of several measurements. So, e.g. you can first set Fs max buf= 300 KHz and perform the measurements for Fs=300 KHz and if there is not signal distortion it means that your computer and operating system can real time transfer the data at the preset sampling frequency Fs=300 KHz. If there is distortion then it is necessary to reduce the sampling frequency, e.g. up to 250 KHz and perform the measurements once again and etc. Upon determining the sampling frequency where there is no distortion in the measurement results, it is expedient to set it as maximum. Theoretically this microcontroller can transfer data at speed of 1 �Bytes/sec but practically it accelerates only to 256 KBytes/sec, as there are not adequate Silabs drivers when operating in the isochoric mode. If the set buffer is small then the sampling frequency can increase up to 400 KHz as, e.g. when reading only 4K data, it will not be enough time for FIFO MK (1024 bytes) to overfull and there will not be distortion accordingly. What are the reasons?
• Pretrigger - allows setting a number of samples (bytes) to be stored until triggering. On the time base this waveform portion is negative, i.e. signal prior to triggering event is up to zero and signal upon triggering is after zero.
• Memory depth - when pipe reading it is determined by available memory size in the computer and in the logical analyzer mode it is artificially limited by 256M. It is not recommended to set the buffer size more than several Mbytes as it is extremely inconvenient to analyze such long signals and by the way, the memory is greatly applied to show (plot) charts on the screen.
• Ch. [7]...[0] - flags enable the data plotting in the corresponding channel of the bus A when pipe reading. As the standard sequential interfaces have a number of channels less than 8 then the bus A is always 8-bit but when plotting the charts of the sequential interface the computer capabilities can be applied in vain because of data plotting in the unused channels.
• Channel for external clocking (bus B) - allows selecting one of 8 channels of the bus B to connect the external clocking generator.
• Bus A inverse (for new devices) - this flag is only required for new devices as to reduce the circuit plate size the channels of the bus A are in inverse order.
• Auto activate the trigger (triggering) - enables to turn on the triggering automatically when pressing any button on the panel "Trigger".
• Skip same bytes during search - when this option is active then when searching it allows to skip a group of consecutive same bytes. For example, bus A contains the following bytes AA' BB CC AA" AA* AA DD AA"', if you need to find sequence AA then upon the first pressing the search button the marker will point AA', upon the second pressing the marker will point AA and upon the third pressing it will be AA"' (if enable skip) or AA* (if disable).
• Show the reading mode info (buf/pipe) - enables to show information about the reading mode on the panel "Frequency".